Hardware neural networks have now passed the novelty stage. From chips to PC coprocessors to full scale neurocomputers, there are number of choices. However, one may find that for a particular application the choices are limited and involve various tradeoffs. The ETANN, for example, offers high speed analog processing but with low precision. The Neuroclassifier offers extremely high speed but also low precision and only a few hidden units. Neurocomputers like the CNAPS can offer high speed, large networks, and multiple net architectures, but are expensive and have elaborate software environments. The radial basis function networks can offer high performance, especially for learning, but may not have sufficient generalization powers for some applications. Accelerator boards can suffice for running very large networks in a reasonable time, but probably not in real-time, where the VME cards are most viable.
For high energy physics applications, there are now a number of options for the second level trigger, especially when the network sizes involve around 60 inputs/neurons per layer. Both digital and analog systems are available. So far the work has only involved feedforward layer networks but it would be interesting to investigate applications of the radial basis function networks. For the first level, the only real option is the Neuroclassifier, although several chips must be combined for networks with more than 6 hidden units.
Acknowledgments
We would like to thank the help of B. Denby, Å. Eide, G. Sekhniaidze and other co-workers. This
work was supported in part by grants from the Swedish Engineering Sciences Research Council (TFR) under
contract Doss 240, Dnr: 93-400, from the Natural Sciences Research Council (NFR) and from the Carl Trygger
Foundation. We also acknowledge the support of M. Holler and F. Martin of Intel, and
J.-P. LeBouquin and M. Grandguillot of IBM-Essonnes.
References